A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

Guénolé Lallement; Fady Abouzeid; Martin Cochet; Jean-Marc Daveau; Philippe Roche; Jean-Luc Autran

doi:10.1109/JSSC.2018.2821167

Journal articles

A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

Guénolé Lallement ^{1, 2} Fady Abouzeid ³ Martin Cochet ^{2, 1} Jean-Marc Daveau ¹ Philippe Roche ¹ Jean-Luc Autran ²

1 ST-CROLLES - STMicroelectronics [Crolles]

2 IM2NP - Institut des Matériaux, de Microélectronique et des Nanosciences de Provence

3 STMicroelectronics

Document type :

Journal articles

Domain :

Engineering Sciences [physics] / Micro and nanotechnologies/Microelectronics

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https://hal-amu.archives-ouvertes.fr/hal-02111060
Contributor : Jean-Luc Autran <>
Submitted on : Thursday, April 25, 2019 - 5:22:42 PM
Last modification on : Tuesday, March 30, 2021 - 3:23:37 AM

A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

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A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

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