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A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI

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https://hal-amu.archives-ouvertes.fr/hal-02111060
Contributor : Jean-Luc Autran <>
Submitted on : Thursday, April 25, 2019 - 5:22:42 PM
Last modification on : Monday, December 9, 2019 - 1:36:02 PM

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Guénolé Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, et al.. A 2.7 pJ/cycle 16 MHz, 0.7 microW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI. IEEE Journal of Solid-State Circuits, Institute of Electrical and Electronics Engineers, 2018, 53 (7), pp.2088-2100. ⟨10.1109/JSSC.2018.2821167⟩. ⟨hal-02111060⟩

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