The generation and characterization of electron and hole traps created by hole injection during low gate voltage hot-carrier stressing of n-MOS transistors
Résumé
Hot-carrier stressing has been carried out on conventional and MDD n-MOS transistors under low gate voltage conditions (Vg <= Vd/4). Following the stress, the devices were subjected to short alternate phases of electron and hole injection into the oxide in order to identify the damage species generated. It is shown that the damage created consists principally of hole and electron oxide traps. This is confirmed using the charge pumping technique. Maximum damage is obtained for conditions of maximum hole injection, indicating that hot holes are responsible for both types of defects. Comparison with maximum interface state damage shows that degradation due to electron traps can be significantly greater than interface state creation the stressing of n-MOS devices at high drain voltages. The damage is shown to be localized. Two-dimensional simulation of localized charge placed close to the drain junction suggests that equal quantities of positive and negative charge might be created by this stressing. Measurements of capture cross sections for electron trapping reveal two cross sections, s1 = 3E-15 and s2 = 3E-16. It is finally shown that a simple relation exists between the lifetime for electron trap creation and (lsub/Id) enabling this type of damage to be easily characterized.